Raspberry Pi /RP2350 /DMA /SECCFG_CH9

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Interpret as SECCFG_CH9

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (P)P0 (S)S0 (LOCK)LOCK

Description

Security configuration for channel 9. Control whether this channel performs Secure/Non-secure and Privileged/Unprivileged bus accesses.

If this channel generates bus accesses of some security level, an access of at least that level (in the order S+P > S+U > NS+P > NS+U) is required to program, trigger, abort, check the status of, interrupt on or acknowledge the interrupt of this channel.

This register automatically locks down (becomes read-only) once software starts to configure the channel.

This register is world-readable, but is writable only from a Secure, Privileged context.

Fields

P

Privileged channel. If 1, this channel performs Privileged bus accesses. If 0, it performs Unprivileged bus accesses.

If 1, this channel is controllable only from a Privileged context of the same Secure/Non-secure level, or any context of a higher Secure/Non-secure level.

S

Secure channel. If 1, this channel performs Secure bus accesses. If 0, it performs Non-secure bus accesses.

If 1, this channel is controllable only from a Secure context.

LOCK

LOCK is 0 at reset, and is set to 1 automatically upon a successful write to this channel’s control registers. That is, a write to CTRL, READ_ADDR, WRITE_ADDR, TRANS_COUNT and their aliases.

Once its LOCK bit is set, this register becomes read-only.

A failed write, for example due to the write’s privilege being lower than that specified in the channel’s SECCFG register, will not set the LOCK bit.

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